Freescale upgrades processor architecture for data boom
Freescale has beefed up its QorIQ range of multicore processors to address the rise of the cloud, and to complement its recently announced Qonverge li
Published: 22 June, 2011
Freescale has beefed up its QorIQ range of multicore processors to address the rise of the cloud, and to complement its recently announced Qonverge line of base station systems, targeting “the rest of the communications market”, whether wireless or wireline.
The new generation of the three-year old QorIQ architecture is labelled AMP (Advanced Multiprocessing) Series, and it expands the maximum number of processor cores from eight to 12, using the PA (Power Architecture) design. Since each is able to run two independent threads, that means a total of 24 virtual cores. The top end chip, the 24-core T4240, will sample in the first quarter of 2012, and will be showcased at the company’s developer event in Texas this week.
When it first launched the architecture, Freescale threw down the gauntlet to the king of wireless infrastructure silicon, Texas Instruments – which has admitted its rival caught it offguard. TI has since upgraded its own platform and the two firms are battling fiercely for the LTE base station sector, both touting SoC designs that range from macrocells to femtocells – and having to fend off smaller challengers with expertise in cutting edge areas such as small cells and massive multicore. Among these are Picochip and Mindspeed, while in multicore, Tilera has achieved a 100-core chip.
Both Freescale and TI talk up their ability to scale from small to large platforms, and their high levels of integration. AMP squeezes a host of functions onto one design, including DSP, compression/decompression, power management and a wide range of acceleration engines. They also make similar arguments about keeping core numbers relatively low to reduce programming complexity.
With AMP, Freescale extends QorIQ further into the high end network processing market, complementing the Qonverge base station SoCs it unveiled at Mobile World Congress in February. It is also skipping the 32nm process to go straight to more power efficient 28nm. All this is geared to the explosion of internet traffic and cloud services. Lisa Su, general manager of networking and multimedia at Freescale, told EETimes: “The trend is clear. Internet traffic is exploding faster than Moore’s Law.” This requires network processor makers to boost their performance by at least 3-4 times per generation.
Freescale promises code compatibility between AMP and all other QorIQ, Qonverge and PowerQUICC processors. These different chips are designed to share an architecture but be used as building blocks, each targeting a different aspect of the communications network. AMP will come in three families of products – control plane processors for carrier routers and storage networks; high end data plane processors for routers, switches, access gateways and military applications; and low end data plane processors for media gateways, network attached storage and integrated service routers.
While TI is the arch-rival in base stations, further into the network Freescale meets Intel’s Sandy Bridge, as well as SoC makers like Cavium and Netlogic, both of which use the MIPS architecture.