ARM CoreLink broadens networking processor range
Firm extending its low power architecture to servers and communications, partners with LSI on terabit interconnect
Published: 11 October, 2012
The processor architectures of ARM and Intel are battling on three fronts - mobile devices, servers and embedded chips - and are increasingly moving on the mobile network, where PowerPC and others have ruled the roost. ARM unveiled its CoreLink interconnect technology this week, along with a memory controller, both targeted at networking and storage equipment.
Texas Instruments, LSI and even - to a more limited extent - PowerPC's greatest backer Freescale, have included ARM cores in their network infrastructure platforms. The UK-based firm sees expanding opportunities as the makers of base station and communication processors rethink their designs in order to cope with the rising demands of mobile data traffic.
At the Linley Tech Processor Conference in San Jose, California ARM said its latest offerings should ship in commercial products in 2014. Its latest intellectual property blocks are the CoreLink CCN-504 interconnect (in effect an on-die network) and the CoreLink DMC-520 dynamic memory controller.
The two designs work together, with the former providing the 'glue' to connect cores and cache components, within a chip and also to other system elements. It promises real world throughput of 1Tbps speeds (peaks of 1.5Tbps) with 128-bit internal bus, 16Mbytes of shared L3 cache and dual memory channels to link to the DMC-520 memory controllers. There is support for up to ARM cores, whether the current high end 32-bit Cortex A15, or the upcoming 64-bit ARM v8. The CCN-504 can scale up from single-core CPUs to four clusters of four cores each, meaning the common architecture can power infrastructure from small cells to macrocells to communications.
The 504 can be linked to several flavors of high speed networking technology, such as 40Gig Ethernet, and is suited to wired and wireless infrastructure.
ARM focuses its differentiation in the usual area, its low power consumption, which is becoming a critical issue for servers and networks, not just devices, as operators require ever more horsepower to manage their data. Its low energy credentials underpin the whole strategy, of which CoreLink is a part, to push its architecture into as many markets as possible, squeezing x86, PowerPC and Mips.
In this case, the target applications are communications and storage at the edge of the network, an area which Intel is also chasing. For both, according to Jim McGregor, principal analyst at Tirias Research, the first wins will come by displacing custom ASICs or specialized RISC architectures, before the two giants really go head-to-head.
As in mobile devices, ARM will stand or fall on its ecosystem and the breadth of support for its platforms, which reduce the risk of relying on a relatively small player, accelerate R&D efforts, and ensure control does not rest with one major firm. In the networking market, SoC supporters include Broadcom, Cavium, Freescale, Huawei, LSI, Mindspeed and TI. Freescale still uses its trademark PowerPC for much of its networking and base station range, but recently adopted ARM for small cells and there is considerable speculation that it will make a fuller conversion over time as power reduction pressures mount.
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